Crossover Operators For A Hardware Implementation Of GP Using FPGAs And Handel-C

Analysis of the Behavior of a Hardware Implementation of GP using FPGAs and Handel-C

This paper analyses the behavior of a hardware implementation of Genetic Programming using Field Programmable Gate Arrays. Three crossover operators that limit the lengths of programs are analyzed. A truncating operator, a limiting operator that constrains the lengths of both offspring and a limiting operator that only constrains the length of one offspring. The latter has some interesting prop...

Genetic programming in hardware

Genetic Programming in Hardware This thesis describes a hardware implementation of a complete Genetic Programming (GP) system using a Field Programmable Gate Array, which is shown to speed-up GP by over 400 times when compared with a software implementation of the same algorithm. The hardware implements the creation of the initial population, breeding operators, parallel fitness evaluations and...

An Analysis Of Random Number Generators For A Hardware Implementation Of Genetic Programming Using FPGAs And Handel-C

This paper analyses the effect of using different random number generators (RNG) in a hardware implementation of Genetic Programming using Field Programmable Gate Arrays. Hardware systems have typically used RNGs based on Logical Feedback Shift Registers or Cellular Automata. Different configurations of these generators are evaluated as well as using a source of true random numbers and a standa...

A Pipelined Hardware Implementation of Genetic Programming Using FPGAs and Handel-C

Improving the Performance of the IDEA Cryptographic Algorithm Using FPGAs

Nowadays, the cryptography field is on the increase in the telecommunications world, because of this there is a constant need of more secure and efficient cryptographic algorithms. Thus, a lot of research is being done in order to try to improve the current algorithm performance. At present, one of the alternatives under research is the implementation of these algorithms in FPGAs (Field-Program...